Maxim-integrated MAXQ7666 Manual de usuario descargar pdf (Pagina 52)

100

101

1.4.7 Interrupt Identification Register (IIR)

The first six bits in this register indicate interrupts pending in modules 0 to 5, one bit per module. The eighth bit, IIS, indicates a pend-

ing system interrupt, such as from the watchdog timer. The interrupt pending flags will be set only for enabled interrupt sources wait-

ing for service. The interrupt pending flag will be cleared when the pending interrupt sources within that module are disabled or when

the interrupt flags are cleared by software.

Bit 7: Interrupt Identifier Flag for System Modules (IIS)

Bit 6: Reserved. Read 0, write ignored.

Bits 5 to 0: Interrupt Identifier Flag for Register Module 5 to 0 (II5 to II0)

1.4.8 System Clock Control Register (CKCN)

The 8-bit CKCN register is part of the system register group and used to support system clock generation. It controls the system clock

speed and power management mode selection. See

Section 5

for the description of this register.

MAXQ7665/MAXQ7666 User’s Guide

1-50

Bit #

76543210

Name IIS — II5 II4 II3 II2 II1 II0

Reset 0 0 0 0 0 0 0 0

Access r r r r r r r r

r = read

Note: This register is cleared to 00h on all forms of reset.

Bit #

76543210

Name XT — RGMD STOP SWB PMME CD1 CD0

Reset 0 0 1 0 0 0 0 1

Access rw r r rw rw rw rw rw

r = read, w = write

Note: Bits 4:0 are set to 00001b on all forms of reset. See bit description for bits 7 and 5.

Maxim Integrated

1 2 ... 47 48 49 50 51 52 53 54 55 56 57 ... 385 386

Comentarios a estos manuales

Sin comentarios

Maxim-integrated MAXQ7666 Manual de usuario Pagina 52

Comentarios a estos manuales

Relacionado con productos y manuales para Hardware Maxim-integrated MAXQ7666