Maxim-integrated MAXQ Family Users Guide: MAXQ8913 Supplement Manual de usuario

Functional DiagramsPin Configurations appear at end of data sheet.Functional Diagrams continued at end of data sheet.UCSP is a trademark of Maxim Inte

MAXQ Family User’s Guide: MAXQ8913 Supplement2-1ADDENDUM TO SECTION 2: ARCHITECTUREThe MAXQ8913 shares the common architecture features with oth

MAXQ Family User’s Guide: MAXQ8913 Supplement25-1SECTION 25: UTILITY ROM (SPECIFIC TO MAXQ8913)25.1 OverviewThe MAXQ8913 utility ROM includes routines

MAXQ Family User’s Guide: MAXQ8913 Supplement25-225.2 In-Application Programming Functions25.2.1 UROM_flashWriteNotes:• This function uses one stack

MAXQ Family User’s Guide: MAXQ8913 Supplement25-325.3 Data Transfer FunctionsThe following utility ROM functions are used to transfer data from one me

MAXQ Family User’s Guide: MAXQ8913 Supplement25-425.3.1 UROM_moveDP0Notes:• Before calling this function, DPC should be set appropriately to configur

MAXQ Family User’s Guide: MAXQ8913 Supplement25-525.3.4 UROM_moveDP1Notes:• Before calling this function, DPC should be set appropriately to configur

MAXQ Family User’s Guide: MAXQ8913 Supplement25-625.3.7 UROM_moveBPNotes:• Before calling this function, DPC should be set appropriately to configure

MAXQ Family User’s Guide: MAXQ8913 Supplement25-725.3.10 UROM_copyBufferNotes:• This function can be used to copy from program flash to data RAM, or

MAXQ Family User’s Guide: MAXQ8913 Supplement25-825.4.2 Utility ROM Example 2: Reading Constant Byte Data from Flash (Indirect Function Call) move D

MAXQ Family User’s Guide: MAXQ8913 SupplementA1-1APPENDIX 1: MAXQ8913 DEVICE INCLUDE FILE FOR MAX-IDE;================================================

MAXQ Family User’s Guide: MAXQ8913 SupplementA1-2;====================================================================;= Module 0 =;==================

MAXQ Family User’s Guide: MAXQ8913 Supplement2-2Figure 2-1. MAXQ8913 System and Peripheral Register MapOOhMCNTO1hO2hO3hO4hO5hO6hO7hO8hO9h10h11hREGISTE

MAXQ Family User’s Guide: MAXQ8913 SupplementA1-3#define SPICN M1[2] ; SPI Control#define SPIB M1[3] ; SPI Data Buffer#define I2CCN M1[4]

MAXQ Family User’s Guide: MAXQ8913 SupplementA1-4#define TBR M2[7] ; Timer B Capture/Reload#define MC1R M2[8] ; Multiplier Read Register 1#de

MAXQ Family User’s Guide: MAXQ8913 SupplementA1-5; Reserved *M3[13]; Reserved *M3[14]; Reserved *M3[15]; Reserved *M3[16]; Reserved

MAXQ Family User’s Guide: MAXQ8913 SupplementA1-6#define UROM_flashEraseAll #087C1h#define UROM_moveDP0 #087D0h#define UROM_moveDP0inc #087D3h#defi

MAXQ Family User’s Guide: MAXQ8913 SupplementREVISION HISTORYREVISION NUMBERREVISION DATESECTION NUMBERDESCRIPTIONPAGES CHANGED0 8/09 — Initial releas

MAXQ Family User’s Guide: MAXQ8913 Supplement2-32.4 Memory OrganizationAs with all MAXQ microcontrollers, the MAXQ8913 contains logically separate pro

MAXQ Family User’s Guide: MAXQ8913 Supplement2-4Figure 2-2. Memory Map When Executing from Program Flash MemoryFigure 2-3. Memory Map When Executing f

MAXQ Family User’s Guide: MAXQ8913 Supplement2-52.6 Clock GenerationAll functional modules in the MAXQ8913 are synchronized to a single system clock.

MAXQ Family User’s Guide: MAXQ8913 Supplement2-62.6.2 Ring OscillatorThe MAXQ8913 contains an internal ring oscillator that can optionally be used as

MAXQ Family User’s Guide: MAXQ8913 Supplement2-7Table 2-1. System Clock Generation and Control RegistersBecause the RGSL bit is cleared by power-on re

MAXQ Family User’s Guide: MAXQ8913 Supplement2-82.8 Reset ConditionsThere are four possible reset sources for the MAXQ8913. While in the reset state,

MAXQ Family User’s Guide: MAXQ8913 Supplement2-92.8.1 Power-On ResetWhen power is first applied to the MAXQ8913, or when the supply voltage at DVDD dr

MAXQ Family User’s Guide: MAXQ8913 Supplement2-10Figure 2-7. External Reset TimingTable 2-3. System Power-Management Registers2.9 Power-Management Fea

MAXQ Family User’s Guide: MAXQ8913 SupplementiiTABLE OF CONTENTSADDENDUM TO SECTION 1: OVERVIEW 1-11.1 References. . . . . . . . . . . . . . . . . .

MAXQ Family User’s Guide: MAXQ8913 Supplement2-112.9.1 Divide-by-256 Mode (PMM)In this power-management mode, all operations continue as normal, but a

MAXQ Family User’s Guide: MAXQ8913 Supplement2-12When the processor exits stop mode, program execution resumes using the previously selected clock sou

MAXQ Family User’s Guide: MAXQ8913 Supplement3-1ADDENDUM TO SECTION 3: PROGRAMMINGRefer to Section 3: Programming of the MAXQ Family User’s Guide for

MAXQ Family User’s Guide: MAXQ8913 Supplement4-1ADDENDUM TO SECTION 4: SYSTEM REGISTER DESCRIPTIONSRefer to Section 4: System Register Descriptions of

MAXQ Family User’s Guide: MAXQ8913 Supplement4-2Table 4-2. System Register Bit Functions (continued)Table 4-3. System Register Reset ValuesNote: Bits

MAXQ Family User’s Guide: MAXQ8913 Supplement4-34.1 System Register DescriptionsThis section details the functionality of any system register containe

MAXQ Family User’s Guide: MAXQ8913 Supplement4-44.1.3 System Control Register (SC, M8[08h])Bit 7: Test Access (Debug) Port Enable (TAP)0 = Debug port

MAXQ Family User’s Guide: MAXQ8913 Supplement4-54.1.5 System Clock Control Register (CKCN, M8[0Eh])The CKCN register bit settings determine the system

MAXQ Family User’s Guide: MAXQ8913 Supplement4-6Table 4-4. System Clock ModesRGMD SWB PMME CD1 CD0 SYSTEM CLOCK SWITCHBACK0 0 0 0 0 High-frequency clo

MAXQ Family User’s Guide: MAXQ8913 Supplement5-1ADDENDUM TO SECTION 5: PERIPHERAL REGISTER MODULESTable 5-1. Peripheral Register MapNote: Register nam

MAXQ Family User’s Guide: MAXQ8913 Supplementiii6.1.3 Port 0 Input Disable Register (PID0, M0[0Dh]) . . . . . . . . . . . . . . . . . . . . . . . . .

MAXQ Family User’s Guide: MAXQ8913 Supplement5-2Table 5-2. Peripheral Register Bit FunctionsREGBIT15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0PO0 PO0 (8 bits

MAXQ Family User’s Guide: MAXQ8913 Supplement5-3Table 5-2. Peripheral Register Bit Functions (continued)Table 5-3. Peripheral Register Bit Reset Value

MAXQ Family User’s Guide: MAXQ8913 Supplement5-4Table 5-3. Peripheral Register Bit Reset Values (continued)Note: Bits marked as “s” have special behav

MAXQ Family User’s Guide: MAXQ8913 Supplement6-1ADDENDUM TO SECTION 6: GENERAL-PURPOSE I/O MODULEThe MAXQ8913 provides up to 12 port pins for general-

MAXQ Family User’s Guide: MAXQ8913 Supplement6-2Table 6-1. Port Pin Special and Alternate Functions (continued)The port pins on the MAXQ8913 operate t

MAXQ Family User’s Guide: MAXQ8913 Supplement6-36.1 GPIO and External Interrupt Register DescriptionsThe following peripheral registers are used to co

MAXQ Family User’s Guide: MAXQ8913 Supplement6-46.1.4 Port 0 Output Register (PO0, M0[00h]) This register stores the data that is output on any of the

MAXQ Family User’s Guide: MAXQ8913 Supplement6-56.1.8 External Interrupt Flag 0 Register (EIF0, M0[02h])Each bit in this register is set when a negati

MAXQ Family User’s Guide: MAXQ8913 Supplement6-66.1.10 External Interrupt Enable 0 Register (EIE0, M0[03h])Each bit in this register controls the enab

MAXQ Family User’s Guide: MAXQ8913 Supplement6-76.1.12 External Interrupt Edge Select 0 Register (EIES0, M0[0Ah])Each bit in this register controls th

MAXQ Family User’s Guide: MAXQ8913 SupplementivADDENDUM TO SECTION 16: IN-CIRCUIT DEBUG MODE 16-116.1 Register Read and Write Commands . . . . . . .

MAXQ Family User’s Guide: MAXQ8913 Supplement6-86.2 Port Pin Examples6.2.1 Port Pin Example 1: Driving Outputs on Port 0 move PO0, #000h ; Set all o

MAXQ Family User’s Guide: MAXQ8913 Supplement7-1ADDENDUM TO SECTION 7: TIMER/COUNTER 0 MODULEThe MAXQ8913 does not provide this peripheral module.Maxi

MAXQ Family User’s Guide: MAXQ8913 Supplement8-1ADDENDUM TO SECTION 8: TIMER/COUNTER 1 MODULEThe MAXQ8913 does not provide this peripheral module.Maxi

MAXQ Family User’s Guide: MAXQ8913 Supplement9-1ADDENDUM TO SECTION 9: TIMER/COUNTER 2 MODULEThe MAXQ8913 does not provide this peripheral module.Maxi

MAXQ Family User’s Guide: MAXQ8913 Supplement10-1ADDENDUM TO SECTION 10: SERIAL I/O MODULEThe MAXQ8913 provides one serial universal synchronous/async

MAXQ Family User’s Guide: MAXQ8913 Supplement10-2;==============================================================================;=;= TxChar - Outputs

MAXQ Family User’s Guide: MAXQ8913 Supplement11-1ADDENDUM TO SECTION 11: SERIAL PERIPHERAL INTERFACE (SPI) MODULEThe MAXQ8913 provides a serial periph

MAXQ Family User’s Guide: MAXQ8913 Supplement11-211.2.2 SPI Example 2: Receiving Data in Slave Mode move SPICN, #01h ; Enable SPI in slave mode mov

MAXQ Family User’s Guide: MAXQ8913 Supplement12-1ADDENDUM TO SECTION 12: HARDWARE MULTIPLIER MODULEThe MAXQ8913 provides a hardware multiplier m

MAXQ Family User’s Guide: MAXQ8913 Supplement13-1ADDENDUM TO SECTION 13: 1-Wire BUS MASTERThe MAXQ8913 does not provide this peripheral module.Maxim I

MAXQ Family User’s Guide: MAXQ8913 SupplementvSECTION 21: TIMER/COUNTER B MODULE (SPECIFIC TO MAXQ8913) 21-121.1 Timer/Counter B Register Description

MAXQ Family User’s Guide: MAXQ8913 Supplement14-1ADDENDUM TO SECTION 14: REAL-TIME CLOCK MODULEThe MAXQ8913 does not provide this peripheral module.Ma

MAXQ Family User’s Guide: MAXQ8913 Supplement15-1ADDENDUM TO SECTION 15: TEST ACCESS PORT (TAP)The JTAG/TAP port on the MAXQ8913 is multiplexed with p

MAXQ Family User’s Guide: MAXQ8913 Supplement16-1ADDENDUM TO SECTION 16: IN-CIRCUIT DEBUG MODEThe MAXQ8913 provides an in-circuit debugging interface

MAXQ Family User’s Guide: MAXQ8913 Supplement16-2The first byte output by this command is the value 160 (0A0h), which represents the number of p

MAXQ Family User’s Guide: MAXQ8913 Supplement17-1ADDENDUM TO SECTION 17: IN-SYSTEM PROGRAMMING (JTAG)The MAXQ8913 provides a JTAG-compatible debug por

MAXQ Family User’s Guide: MAXQ8913 Supplement17-217.2 Family 0 Commands (Not Password Protected)Command 00h—No OperationCommand 01h—Exit LoaderThis co

MAXQ Family User’s Guide: MAXQ8913 Supplement17-3Command 05h—Get Supported CommandsThe SupportL (LSB) and SupportH (MSB) bytes form a 16-bit value tha

MAXQ Family User’s Guide: MAXQ8913 Supplement17-4Command 08h—Get Loader VersionCommand 09h—Get Utility ROM VersionCommand 0Ah—Set Word/Byte-Mode Acces

MAXQ Family User’s Guide: MAXQ8913 Supplement17-5Command 11h—Load Data Variable LengthThis command writes (Length) bytes of data into the data SRAM st

MAXQ Family User’s Guide: MAXQ8913 Supplement17-617.5 Family 3 Commands: CRC Variable Length (Password Protected)Command 30h—CRC Code Variable LengthT

MAXQ Family User’s Guide: MAXQ8913 SupplementviSECTION 24: INPUT/OUTPUT AMPLIFIERS (SPECIFIC TO MAXQ8913) 24-124.1 Input/Output Amplifier Overview .

MAXQ Family User’s Guide: MAXQ8913 Supplement17-717.7 Family 5 Commands: Load and Verify Variable Length (Password Protected)Command 50h—Load and Veri

MAXQ Family User’s Guide: MAXQ8913 Supplement18-1ADDENDUM TO SECTION 18: MAXQ FAMILY INSTRUCTION SET SUMMARYRefer to the MAXQ Family User’s Guide. Tab

MAXQ Family User’s Guide: MAXQ8913 Supplement18-2Note 1: The active accumulator (Acc) is not allowed as the src in operations where it is the implici

MAXQ Family User’s Guide: MAXQ8913 Supplement19-1SECTION 19: ANALOG-TO-DIGITAL CONVERTER (SPECIFIC TO MAXQ8913)The MAXQ8913 provides a 12-bit, success

MAXQ Family User’s Guide: MAXQ8913 Supplement19-219.2 Analog-to-Digital Pins and Control RegistersTables 19-1 and 19-2 list the pins and control regis

MAXQ Family User’s Guide: MAXQ8913 Supplement19-3The following peripheral registers are used to control the analog-to-digital converter functions.19.2

MAXQ Family User’s Guide: MAXQ8913 Supplement19-4Bit 7: Internal Reference OK (REFOK). This read-only status bit indicates whether the internal refere

MAXQ Family User’s Guide: MAXQ8913 Supplement19-519.2.2 ADC Conversion Sequence Address Register (ADADDR, M3[01h])Bits 15:12, 7, 3: ReservedBits 11:8

MAXQ Family User’s Guide: MAXQ8913 Supplement19-6Bits 9:8: ADC Clock Divider (ADCLK[1:0]). These bits control the generation of the ADC clock from the

MAXQ Family User’s Guide: MAXQ8913 Supplement19-7Bits 3:0: ADC Sample Acquisition Time Extend (ADACQ[3:0]). These bits set the extended sample acquisi

MAXQ Family User’s Guide: MAXQ8913 SupplementviiLIST OF FIGURESFigure 2-1. MAXQ8913 System and Peripheral Register Map . . . . . . . . . . . . . . .

MAXQ Family User’s Guide: MAXQ8913 Supplement19-819.2.6 ADC Conversion Configuration Registers (ADCFG[0] to ADCFG[7], ADDATA[10h] to ADDATA[17h])The e

MAXQ Family User’s Guide: MAXQ8913 Supplement19-919.2.7 Temperature Sensor Enable Register (TEMPEN, M3[0Ch])Bits 7:1: ReservedBit 0: Temperature Senso

MAXQ Family User’s Guide: MAXQ8913 Supplement19-10waitConvert: move C, ADST.5 jump NC, waitConvert ; Wait for 16 samples to be captured (ADDAI=1)

MAXQ Family User’s Guide: MAXQ8913 Supplement20-1SECTION 20: DIGITAL-TO-ANALOG CONVERTERS (SPECIFIC TO MAXQ8913)20.1 DAC OverviewThe MAXQ8913 provides

MAXQ Family User’s Guide: MAXQ8913 Supplement20-220.2.1 DAC 1 Output Register (DAC1OUT, M3[02h])Bits 15:10: ReservedBits 9:0: DAC 1 Output Value. Bits

MAXQ Family User’s Guide: MAXQ8913 Supplement20-320.2.3 DAC 3 Output Register (DAC3OUT, M3[04h])Bits 7:0: DAC 3 Output Value. This register se

MAXQ Family User’s Guide: MAXQ8913 Supplement21-1SECTION 21: TIMER/COUNTER B MODULE (SPECIFIC TO MAXQ8913)The MAXQ8913 provides one Type B timer/count

MAXQ Family User’s Guide: MAXQ8913 Supplement21-221.1.2 Timer B Timer/Counter Compare Register (TBC, M2[0Bh])Bits 15:0: Timer B Compare Register. This

MAXQ Family User’s Guide: MAXQ8913 Supplement21-3Bit 7: Timer B Overflow Flag (TFB). This bit is set when Timer B overflows from TBR or the count is e

MAXQ Family User’s Guide: MAXQ8913 Supplement21-421.2 Timer/Counter B OperationTimer/Counter B is a 16-bit programmable device that supports clock inp

MAXQ Family User’s Guide: MAXQ8913 SupplementviiiLIST OF TABLESTable 2-1. System Clock Generation and Control Registers. . . . . . . . . . . . . . . .

MAXQ Family User’s Guide: MAXQ8913 Supplement21-521.2.2 Timer B 16-Bit Capture ModeThe 16-bit capture mode of Timer B is configured by setting the CP/

MAXQ Family User’s Guide: MAXQ8913 Supplement21-621.2.3 Timer B 16-Bit Up/Down Count with Autoreload ModeThe 16-bit up/down-count autoreload mode is e

MAXQ Family User’s Guide: MAXQ8913 Supplement21-721.2.4 Timer B Clock Output ModeTimer B can be configured to drive a clock output on the TB0A pin as

MAXQ Family User’s Guide: MAXQ8913 Supplement21-8When the timer is not running (i.e., TRB = 0), the initial output state of the TB0B pin is

MAXQ Family User’s Guide: MAXQ8913 Supplement21-921.2.7 16-Bit Up/Down Count PWM/Output Control ModeFigure 21-7 shows a functional diagram of t

MAXQ Family User’s Guide: MAXQ8913 Supplement21-10Figure 21-7. Timer B Up/Down-Count PWM/Output Control Mode Block DiagramFigure 21-8. Timer B PWM/Out

MAXQ Family User’s Guide: MAXQ8913 Supplement21-1121.2.8 EXENB Control During PWM/Output Control ModeThe TB0B input function (EXENB = 1) and the PWM

MAXQ Family User’s Guide: MAXQ8913 Supplement22-1SECTION 22 : I2C BUS INTERFACE (SPECIFIC TO MAXQ8913)The MAXQ8913 provides an inter-IC (I2C) communic

MAXQ Family User’s Guide: MAXQ8913 Supplement22-222.1.1 I2C Data Buffer Register (I2CBUF, M1[06h])Bits 9:0: This register is used as the read and writ

MAXQ Family User’s Guide: MAXQ8913 Supplement22-3Bit 9: I2C Receiver Overrun Flag (I2CROI). This bit indicates a receive overrun when set to 1. This b

MAXQ Family User’s Guide: MAXQ8913 Supplement1-1ADDENDUM TO SECTION 1: OVERVIEWThis document is provided as a supplement to the MAXQ Family Use

MAXQ Family User’s Guide: MAXQ8913 Supplement22-4Bit 9: I2C Receiver Overrun Interrupt Enable (I2CROIE). Setting this bit to 1 causes an interrupt to

MAXQ Family User’s Guide: MAXQ8913 Supplement22-5Bit 8: I2C General Call Enable (I2CGCEN). Setting this bit to 1 enables the I2C to respond to a gener

MAXQ Family User’s Guide: MAXQ8913 Supplement22-622.1.5 I2C Clock Control Register (I2CCK, M1[0Ch])Bits 15:8: I2C Clock High (I2CCKH[7:0]). These bits

MAXQ Family User’s Guide: MAXQ8913 Supplement22-722.1.7 I2C Slave Address Register (I2CSLA, M1[0Eh])Bits 15:10: Reserved. Read returns zero.Bits 9:7:

MAXQ Family User’s Guide: MAXQ8913 Supplement22-822.2.2 I2C Example 2: Master Mode Receive; I2C configured as master, receive from slave address 08h:;

MAXQ Family User’s Guide: MAXQ8913 Supplement22-922.2.4 I2C Example 4: Slave Mode Receive; I2C configured as slave with address 1ah; Setup for Slave M

MAXQ Family User’s Guide: MAXQ8913 Supplement23-1SECTION 23: SUPPLY VOLTAGE MONITOR AND POWER CONTROL (SPECIFIC TO MAXQ8913)The MAXQ8913 provides a nu

MAXQ Family User’s Guide: MAXQ8913 Supplement23-2Bit 0: High-Frequency Crystal Oscillator Disable (HFXD). Setting this bit to 1 disables the high-freq

MAXQ Family User’s Guide: MAXQ8913 Supplement24-1SECTION 24: INPUT/OUTPUT AMPLIFIERS (SPECIFIC TO MAXQ8913)24.1 Input/Output Amplifier OverviewThe MAX

MAXQ Family User’s Guide: MAXQ8913 Supplement24-2Bit 1: Amplifier 1 Enable (AMPEN1). This bit controls the active-high SHDNR output signal for the rig