Maxim-integrated DS4830 Optical Microcontroller Manual de usuario Pagina 142
- Pagina / 227
- Tabla de contenidos
- MARCADORES
Valorado. / 5. Basado en revisión del cliente
DS4830 User’s Guide
142
The specified hardware multiplier operation begins when the final operand(s) is loaded and will complete in a single cycle.
The read-only MC1R, MC0R result registers can be accessed in the very next cycle unless accumulation/subtraction with
MC2:0 is requested (MCW = 0 and MMAC = 1), in which case, one cycle is required so that stable data can be read.
When MCW = 0, the MC2:0 registers always require one wait cycle before the operation result is accessible. The single
wait cycle needed for updating the MC2:0 registers with a calculated result does not prevent initiating another calculation.
Back-to-back operations can be triggered (independent of data type and operand count) without the need of wait state
between the loadings of operands.
Table 18-1 Hardware Multiplier Operations
MCW:MSUB:MMAC
OPERATION
MC2
MC1
MC0
MC1R:MC0R
OF STATUS
000
Multiply
MA*MB
MA*MB
No
001
Multiply-Accumulate
MC+(MA*MB)
32lsbits of (MC+2*(MA*MB))
Yes
010
Multiply-Negate (SUS = 0 only)
-(MA*MB)
-(MA*MB)
No
011
Multiply-Subtract
MC-(MA*MB)
32lsbits of (MC-2*(MA*MB))
Yes
100
Multiply
MC2
MC1
MC0
MA*MB
No
101
Multiply-Accumulate
MC2
MC1
MC0
32lsbits of (MC+(MA*MB))
No
110
Multiply-Negate (SUS = 0 only)
MC2
MC1
MC0
-(MA*MB)
No
111
Multiply-Subtract
MC2
MC1
MC0
32lsbits of (MC-(MA*MB))
No
18.5 – Hardware Multiplier Peripheral Registers
The hardware multiplier registers are detailed below. Addresses of registers are given as “Mx[yy]” where x is the module
number (from 0 to 5 decimal) and yy is the register index (from 00h to 1Fh hexadecimal).
Table 18-2 Hardware Multiplier Registers
Register
Address
Function
MCNT
M3[00h]
Multiplier Control Register. Selects operation, data type, operand count, hardware square
function, and write option on the MC register. Also contains the overflow flag and the clear
control for operand registers and accumulator.
MA
M3[01h]
Multiplier Operand A Register. Used by the user software to load one of the 16-bit values for
a hardware multiplier operation.
MB
M3[02h]
Multiplier Operand B Register. Used by the user software to load one of the 16-bit values for
a hardware multiplier operation.
MC2
M3[03h]
Multiplier Accumulate Register 2. Contains the two most significant bytes of the accumulator
register. The 48-bit accumulator is formed by MC2, MC1 and MC0. The most significant bit
of this register is the signed bit for signed operations.
MC1
M3[04h]
Multiplier Accumulate Register 1. Contains bytes 3 and 2 of the accumulator register. The
48-bit accumulator is formed by MC2, MC1 and MC0.
MC0
M3[05h]
Multiplier Accumulate Register 0. Contains the two least significant bytes of the accumulator
register. The 48-bit accumulator is formed by MC2, MC1 and MC0.
MC1R
M3[08h]
Multiplier Read Register 1. Contains bytes 1 and 0 result from the last operation when MCW
bit is 1 or the last operation is either multiply-only or multiply-negate. The contents of this
register will remain until an SFR related to the multiplier has been changed.
MC0R
M3[09h]
Multiplier Read Register 0. Contains bytes 3 and 2 result from the last operation when MCW
bit is 1 or the last operation is either multiply-only or multiply-negate. The contents of this
register will remain unchanged until an SFR related to the multiplier has been changed.
- OpticalMicrocontroller 1
- User’sGuide 1
- Contents 2
- SECTION 1 – OVERVIEW 9
- DS4830 User’s Guide 10
- SECTION 2 – ARCHITECTURE 11
- 2.2 – Register Space 12
- 2.3 – Memory Types 13
- 2.5 – Data Alignment 20
- 2.6 – Reset Conditions 20
- 2.7 – Clock Generation 22
- SECTION 5 – INTERRUPTS 36
- 5.1 – Servicing Interrupts 37
- 6.1 – Detailed Description 42
- 6.3 – DAC Code Examples 45
- 7.1 – Detailed Description 46
- 7.3 – ADC Code Examples 58
- SECTION 8 – SAMPLE AND HOLD 60
- 9.1 – Detailed Description 68
- SECTION 10 – I 76
- SECTION 11 – I 89
- C-COMPATIBLE SLAVE INTERFACE 89
- 11.1 – Detailed Description 90
- 12.2 – SPI System Errors 101
- 12.3 – SPI Interrupts 102
- SECTION 13 – 3-WIRE 110
- Using PWMCN and PWMDATA 113
- Core Clock 120
- FrequencyClockPWM 123
- FrequencyFramePWM 123
- * = 01b 127
- MULTIPLIER 140
- SECTION 19 – WATCHDOG TIMER 146
- 20.1 – TAP Controller 150
- 20.2 – TAP State Control 151
- 20.3 – Communication via TAP 152
- 21.2 – Debug Mode 160
- 22.1 – Detailed Description 169
- 22.2 – Bootloader Operation 171
- 22.3 – Bootloader Commands 173
- SECTION 23 – PROGRAMMING 179
- SECTION 24 – INSTRUCTION SET 192
- SECTION 25 – UTILITY ROM 220
- 25.4 – Utility ROM Examples 227
Relacionado con productos y manuales para Hardware Maxim-integrated DS4830 Optical Microcontroller
(76 paginas)© 2020, manymanuals.es. Todos los derechos reservados | 0.040 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Comentarios a estos manuales