Maxim-integrated DS80C390 Manual de usuario Pagina 43

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DS80C390
43 of 58 110199
MULTIPLEXED 9 CYCLE DATA MEMORY 3-CE0 WRITE
ELECTRICAL CHARACTERISTICS (Non-multiplexed address/data bus)
40 MHz VARIABLE CLOCK
PARAMETER SYMBOL MIN MAX MIN MAX UNITS
Oscillator Freq. (Ext. Osc) 1 / t
CLCL
0 40 0 40 MHz
(Ext. Crystal) 1 40 1 40
PSEN Pulse Width
t
PLPH
0.5 t
MCS
- 5 ns
PSEN Low to Valid Instruction In
t
PLIV
0.5 t
MCS
- 20 ns
Input Instruction Hold after PSEN
t
PXIX
0 0 ns
Input Instruction Float after PSEN
t
PXIZ
See MOVX
characteristics
ns
Port 1 Address, Port 4 CE to
Valid Instruction In
t
AVIV1
0.75 t
MCS
- 20 ns
Port 2, 4 Address to Valid
Instruction In
t
AVIV2
0.875 t
MCS
- 25 ns
NOTES FOR AC ELECTRICAL CHARACTERISTICS:
1. All parameters apply to both commercial and industrial temperature operation unless otherwise noted.
2. The value t
MCS
is a function of the machine cycle clock in terms of the processor’s input clock
frequency. These relationships are described in the “Stretch Value Timing” table.
3. All signals characterized with load capacitance of 80 pF except Port 0, ALE, PSEN, RD and WR
with 100 pF.
4. Interfacing to memory devices with float times (turn off times) over 25 ns may cause bus contention.
This will not damage the parts, but will cause an increase in operating current.
5. Specifications assume a 50% duty cycle for the oscillator. Port 2 timing will change in relation to
duty cycle variation.
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