Maxim-integrated 73S12xxF Software Manual de usuario descargar pdf (Pagina 27)

UG_12xxF_016 73S12xxF Software User Guide

Rev. 1.50 27

Synopsis Void RTClk_Init ( void );

Parameters None.

Return Codes None.

RTCClk_Control ()

Purpose Enable or disable the RTC interrupt. If enabled, the interrupt interval must be

specified.

Synopsis RTCClk_Control ( IN Bbool RTCInt_Enb, IN enum RTC_INTERVAL intv );

Parameters RTCInt_Enb: Input parameter

Enable (TRUE) or disable (FALSE) the RTC interrupt. If set to Enable when the intv

parameter is set to NO_INT, the RTC interrupt will NOT be enabled.

Intv: Input parameter

The RTC interrupt interval as defined in API_STRUCT_12.h as follows:

HALF_SEC Interrupt to occur every ½ second.

ONE_SEC Interrupt to occur every 1 second (default).

TWO_SEC Interrupt to occur every 2 seconds.

FOUR_SEC Interrupt to occur every 4 seconds.

EIGHT_SEC Interrupt to occur every 8 seconds.

NO_INT No interrupt.

Return Codes None.

The watchdog timer will give the processor ½ second to respond to an RTC interrupt. If the RTC

interrupt is not serviced within this timeframe, a full reset will be performed.

RTClk_Write ()

Purpose Initialize the Real Time Clock control, counter, accumulator and trim registers. When

this function is called, the RTC is stopped and restarted.

Synopsis Void RTClk_Write ( IN struct RTC_t *pRTC );

Where RTC_t is defined as:

struct RTC_t

{

Unsigned char RTCCtl;

Unsigned long RTCCnt;

Unsigned char RTCAcc[3];

Signed char RTCTrim[3];

}

Parameters RTCCtl: Input parameter

BIT[7-6]: not used

BIT[5]: RTCLoad – when set, RTCCnt, RTCAcc and RTCTrim are loaded at the next

32kHz clock positive edge.

BIT[4-3]: Set tic interval as follows:

0x – 1 second

10 – ½ second

11 – 2 seconds

BIT[2-0]: Set interrupt interval as follows:

100 – ½ second

0xx – 1 second

101 – 2 seconds

110 – 4 seconds

111 – 8 seconds

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